\doxysection{OCTOSPIM\+\_\+\+Type\+Def Struct Reference}
\hypertarget{struct_o_c_t_o_s_p_i_m___type_def}{}\label{struct_o_c_t_o_s_p_i_m___type_def}\index{OCTOSPIM\_TypeDef@{OCTOSPIM\_TypeDef}}


OCTO Serial Peripheral Interface IO Manager.  




{\ttfamily \#include $<$stm32h723xx.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_o_c_t_o_s_p_i_m___type_def_a00583bb77d8e87de7ad6ce630876e45c}{CR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_o_c_t_o_s_p_i_m___type_def_a8cf804cc8ec7765cd3644fc2265424ce}{PCR}} \mbox{[}3\mbox{]}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
OCTO Serial Peripheral Interface IO Manager. 

\label{doc-variable-members}
\Hypertarget{struct_o_c_t_o_s_p_i_m___type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_o_c_t_o_s_p_i_m___type_def_a00583bb77d8e87de7ad6ce630876e45c}\index{OCTOSPIM\_TypeDef@{OCTOSPIM\_TypeDef}!CR@{CR}}
\index{CR@{CR}!OCTOSPIM\_TypeDef@{OCTOSPIM\_TypeDef}}
\doxysubsubsection{\texorpdfstring{CR}{CR}}
{\footnotesize\ttfamily \label{struct_o_c_t_o_s_p_i_m___type_def_a00583bb77d8e87de7ad6ce630876e45c} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t OCTOSPIM\+\_\+\+Type\+Def\+::\+CR}

OCTOSPI IO Manager Control register, Address offset\+: 0x00 \Hypertarget{struct_o_c_t_o_s_p_i_m___type_def_a8cf804cc8ec7765cd3644fc2265424ce}\index{OCTOSPIM\_TypeDef@{OCTOSPIM\_TypeDef}!PCR@{PCR}}
\index{PCR@{PCR}!OCTOSPIM\_TypeDef@{OCTOSPIM\_TypeDef}}
\doxysubsubsection{\texorpdfstring{PCR}{PCR}}
{\footnotesize\ttfamily \label{struct_o_c_t_o_s_p_i_m___type_def_a8cf804cc8ec7765cd3644fc2265424ce} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t OCTOSPIM\+\_\+\+Type\+Def\+::\+PCR\mbox{[}3\mbox{]}}

OCTOSPI IO Manager Port\mbox{[}1\+:3\mbox{]} Configuration register, Address offset\+: 0x04-\/0x20 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+CMSIS/\+Device/\+ST/\+STM32\+H7xx/\+Include/\mbox{\hyperlink{stm32h723xx_8h}{stm32h723xx.\+h}}\end{DoxyCompactItemize}
